الفهرس 
IntroductionOnly 14 pages are availabe for public view
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Abstract
Orthogonal Frequency Division Multiplexing (OFDM) is widely believed to be the enabling technology for wireless communications. OFDM provides high data rates transmission capability and robustness against multipath fading so it helps reducing the effect of inter-symbol interference and inter-carrier interference. Implementations of OFDM rely on very high speed digital signal processing which has become in the last years available at a price that makes OFDM a competitive technology in the marketplace. One of the high performance devices that could be the most flexible solutions for an OFDM implementation is FPGA devices. So, the purpose of this thesis is to implement an OFDM system using an FPGA chip. The chip is coded using VHDL and the system is designed in register transfer level (component modules). The system uses a 9-bit word length and it runs on a fixed point system .The main block in OFDM system is FFT/IFFT. The proposed design is synthesized by using high level design tools The FFT/IFFT processor utilizes a parallel approach and was designed based on the Cooley and Tukey decimation-in-frequency algorithm. The thesis provides a fundamental architecture on how OFDM system is built in industry. The thesis has also accomplished in creating low power consumption design that is suitable for low power portable wireless communication in order to obtain long battery life, speed, and high precision.