الفهرس | Only 14 pages are availabe for public view |
Abstract The thesis is divided into eight chapters as listed below: Chapter 1 Introduction: Introduces thesis context, objectives, and the document structure. Chapter 2 Background: Introduces SerDes PHYs, their use and challenges. MIPI Alliance, its working group and areas of application. Then it starts to focus more on the DSI interface standard and its use. Why it is important, its defined layers and its OSI model. Also, it shows the detailed ASIC design flow and the use of system Verilog testbenches. Chapter 3 Literature Review and Related Work: In this chapter we discuss the literature review and the related work to our thesis topic. Chapter 4 DSI Protocol Layer Design Implementation: This Chapter describes the proposed DSI prototype design implementation in detail. Chapter 5 Verification Plan: This chapter starts to discuss the proposed verification plan to put the design under test under the microscope. Chapter 6 Proposed UVM Environment: Describes in detail the proposed UVM environment introduced in this thesis. Chapter 7 xii Results: This chapter summarizes the results obtained in detail for the proposed verification techniques used, also shows the coverage percentage reached at the end of the verification process. Chapter 8 Conclusion and Future Work: Sums up the thesis topic, the results reached, and demonstrates our future work. |