الفهرس يوجد فقط 14 صفحة متاحة للعرض العام
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المستخلص
This Thesis presents the system and circuit level design of a NBIoT receiver (RX) based on 3GPP Technical Specification (TS) 36.101. Required sensitivity is 108dBm in 200kHz bandwidth, while expected blocker level is 15dBm at ±85MHz offset from required signal.This places a restriction on both gain and filtration such that gain shall be large to be able to receive low level wanted signal while filtration shall be large such that all RX chain blocks operate linearly.This design targets serving many NBIoT operation bands, namely from 400MHz to 2.3GHz. So no offchip filter is used. This dictates large linearity specification on the RF front end to avoid desensitization by 15dBm outofband blockers (OOBs). Large linearity specification leads to large power consumption. A solution is proposed to reduce power consumption of the RF front end, while achieving high gain and high linearity.The proposed RF front end provides 29.5dB gain and 10.9dBm IIP3 while consuming 2mW from a single 1.1V power supply. The solution includes adding gain programmability to conventional resistive feedback LNA to relax the tradeoff between linearity and power consumption. The RF front end is designed using a 40nm CMOS technology and occupies an area of 0.2mm²