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Abstract
This thesis presents analysis of the non-idealities in the feedback path of ΣΔ Force-Feedback MEMS inertial sensors as well as the circuit implementation of the reference voltage for the
feedback. A high-performance MEMS accelerometer sensing system is used as a test-vehicle for the presented analysis and design.
On the system level, analysis is performed on the effect of clock-jitter in the feedback path on the signal-to-noise (SNR) ratio of the accelerometer system. The effect of both white jitter
and cumulative jitter are investigated. It is shown that cumulative jitter has negligible effect on the SNR of high performance ΣΔ Force-Feedback systems. On the other hand, it is shown that
white jitter can severely limit the SNR of ΣΔ Force-Feedback systems. Analytical relations are derived for the effect of Jitter on SNR.
Analysis is also performed on the effect of the reference voltage noise, in the feedback path, on the SNR of ΣΔ Force-Feedback systems. Analytical relations are derived that describe the
effect of the reference noise on the achievebale SNR. It is shown that the reference noise does not limit the sensitivity of the system; it only affects the maximum achievable SNR. It is also shown that the maximum SNR will be independent on the signal level; it will only depend on the Reference Voltage-to-Reference voltage noise ratio.
Based on the system-level analysis, specs are derived for the voltage reference for achieving a 110dB SNR on system level. The various reference-voltage technologies are overviewed, and
bandgap technology is chosen. Circuit implementation of a low-noise bandgap reference circuit is then performed on a SiGe 0.35μm BiCMOS technology. Three different topologies of the bandgap
voltage are implemented and simulated.
The 1st bandgap circuit is a conventional CMOS implementation of the bandgap circuit with a 1st order temperature compensation. Chopping is used to overcome 1/f noise. Circuit
implementation is made to enable trimming the reference for minimum temperature coefficient in case of process variations. This reference achieves a total integrated noise of 1μV from 1 mHz to 100Hz with a reference voltage value of 1.2V.
The 2nd circuit is also a 1st order compensated bandgap that makes use of the npn bipolars available in the technology to achieve the low-flicker noise target. The circuit is capable of
generating a 1.2V and a 2.4V references simultaneously and achieves a total integrated noise of less than 2μV (in the 1mHz-100Hz range) on the 2.4V reference.
In the 3rd circuit, a new higher-order temperature compensation technique is proposed and implemented. The circuit achieves a 0.55ppm/◦C temperature coefficient over the -40◦C-125◦C
temperature range. The integrated noise, however, is an order of magnitude larger than the other
two implementations.